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93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
2.6
Erase/Write Disable and Enable
(EWDS/EWEN)
enabled until an EWDS instruction is executed or Vcc is
removed from the device.
The 93XX46A/B/C powers up in the Erase/Write Disable
(EWDS) state. All programming modes must be preceded
by an Erase/Write Enable ( EWEN ) instruction. Once the
EWEN instruction is executed, programming remains
To protect against accidental data disturbance, the EWDS
instruction can be used to disable all erase/write functions
and should follow all programming operations. Execution
of a READ instruction is independent of both the EWEN and
EWDS instructions.
FIGURE 2-5:
EWDS TIMING
T CSL
CS
CLK
DI
1
0
0
0
0
x
???
x
FIGURE 2-6:
EWEN TIMING
T CSL
CS
CLK
DI
1
0
0
1
1
x
???
x
2.7 Read
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (if ORG pin is low or A-version
devices) or 16-bit (if ORG pin is high or B-version
devices) output string.
The output data bits will toggle on the rising edge of the
CLK and are stable after the specified time delay (T PD ).
Sequential read is possible when CS is held high. The
memory data will automatically cycle to the next register
and output sequentially.
FIGURE 2-7:
CS
CLK
READ TIMING
DI
1
1
0
A N
? ? ?
A0
DO
High-Z
0
Dx
???
D0
Dx
???
D0
Dx
???
D0
? 2002-2011 Microchip Technology Inc.
DS21749J-page 9
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